The present invention relates to memory expansion systems for microprocessors and more particularly to a high-speed memory mapping system.
At one time or another one may desire to expand the storage capability of a particular microcomputer. However, there are two basic limits to storage or memory space: logical and physical. Logically a microcomputer is limited to a certain amount of addressable memory by its instruction set. Any linked set of code is usually confined to a certain logical space, depending upon the address size supported by the instruction set. The maximum number of bits allowed in a typical microcomputer is 16 which yields a total of 64K (K=1024) addresses. The physical limits of memory space are determined by the number of wires carrying an address to the memory.
If memory expansion beyond the logical address space is desired, some transformation or translation must be applied to the logical address to convert it to a physical address. This translation consists of combining the logical address, or a portion of it, with a base address which is obtained in a particular manner. The method of selecting the base address and combining it with the logical address has been used to classify memory expansion techniques. The three basic methods of translating a logical address into a physical address are: memory mapping, bank switching, and the use of base registers.
Memory mapping involves dividing the logical address into essentially two parts--a descriptor, which is a set of the most significant bits, and a displacement, which is the remaining bits of the address. A function is applied to the descriptor, and the result of this function is a physical address which may be called a page address. The displacement is added to the page to give a physical address. In most cases, the page address is concatenated with the displacement.
The transformation or function applied to the descriptor has been normally provided by a binary-to-N line decoder or more recently a read-only-memory (ROM). The ROM is utilized to translate a logical address into a physical address by decoding the address bus. The ROM can infer information about which address is being selected by processing a portion of the address bus through its memory. Such a ROM-based memory mapping system is described in "ROM Decoder for Memory Mapped .mu.P Systems" by S. Bennett, Electronic Engineering. Vol. 51, No. 622, May 1979. However, if one desires to change the memory map in this system the ROM has to be reprogrammed or physically replaced. Therefore considerable time is wasted in changing memory maps.